14 Output Rails PMIC Power Supply, STM32MP1 companion device

Scheme Multi-Output Regulator.jpg
Scheme Multi-Output Regulator.jpg

  • ◾Large input voltage range from 2.8 V to 5.5 V
  • ◾4 adjustable general purpose LDOs
  • ◾1 LDO for USB PHY supply with automatic power source detection
  • ◾1 reference voltage LDO for DDR memory

14 Output Rails PMIC, 4 Adjustable Constant ON Time (COT) Buck SMPS converters BOOST with Bypass, LDO for Memory Power Supply

The STPMIC1 is a fully integrated power management IC designed for products based on high integrated application processor designs requiring low power and high efficiency.

The device integrates advanced low power features controlled by a host processor via I²C and IO interface.


 The STPMIC1 regulators are designed to supply power to the application processor as well as to the external system peripherals such as: DDR, Flash memories and other system devices.


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  • 1 LDO for DDR3 DDR3 termination (sink-source) or bypass mode for lpDDR or general purpose
  • 4 adjustable adaptive constant on-time (COT) buck SMPS converters
  • 5.2 V / 1.1 A boost SMPS with bypass mode for 5 V input or battery input
  • 1 power switch 500 mA USB OTG compliant
  • 1 power switch 500 mA/1000 mA general purpose
  • User programmable non-volatile memory (NVM), enabling scalability to support a wide range of applications
  • I²C and digital IO control interface
  • WFQFN 5x6x0.8 44 leads
  • Integrated PMU for complete MPU applications
  • eReaders, weareable, IoT
  • Portable devices
  • Man-machine interfaces
  • Home automation
  • System on-module